As a method for manufacturing an SOI wafer, especially a method for manufacturing a thin-film SOI wafer that enables improving performance of an advanced integrated circuit, a method for manufacturing an SOI wafer by bonding and then delaminating an ion implanted wafer (an ion implantation delamination method: technology which is also called a smart cut method (a registered trademark)) attracts attention.
According to this ion implantation delamination method, an oxide film is formed on at least one of two silicon wafers, gas ions, e.g., hydrogen ions or rare gas ions are implanted from an upper surface of one silicon wafer (a bond wafer), and an ion implanted layer (which is also referred to as a micro bubble layer or a sealed layer) is formed in the wafer. Subsequently, the surface from which the ions were implanted is pressed against the other silicon wafer (a base wafer) through the oxide film, then a heat treatment (a delamination heat treatment) is applied, and the micro bubble layer is determined as a cleavage plane, and the one wafer (the bond wafer) is delaminated in a thin film form. Further, this is technology for applying a heat treatment (a bonding heat treatment) and effecting strong bonding to manufacture an SOI wafer (see Patent Literature 1). At this stage, an SOI wafer having the cleavage plane (a delaminated surface) serving as a surface of an SOI layer, a small SOT film thickness, and high homogeneity is relatively easily obtained.
Furthermore, according to this ion implantation delamination method, again applying reclaiming processing (refresh processing) including surface processing such as polishing or etching to the bond wafer after delamination (a delaminated wafer) enables reducing or eliminating a step produced on an unbonded portion, surface roughness after delamination, or an influence of a remaining implantation layer, and the wafer can be repeatedly used. As regards this reclaiming processing method, for example, like Patent Literature 2, a method for combining chamfering processing with polishing, eliminating an influence of a remaining ion implantation layer present in a chamfered portion, and performing polishing has been suggested.
Moreover, Patent Literature 3 discloses that reclaiming polishing is performed with respect to a delaminated wafer based on double-side polishing with a stock removal of approximately 10 μm (5 μm on each surface of a substrate).